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Introducing Microchip’s 3U OpenVPX Timing Card: SV-3100-C00

Microchip’s 3U OpenVPX Timing Card uses a first-of-its-kind timing architecture to realize the benefits of both centralized and decentralized Position, Navigation and Timing (PNT) source deployment.

The development of Position, Navigation and Timing (PNT) systems with a high level of assurance and resilience for electronic warfare and sensors has gained importance because of concerns related to GNSS vulnerabilities, interference or even complete denial, especially in hostile environments.

These concerns can be addressed by integrating robust and resilient PNT components such atomic clocks; GNSS receivers, both civilian and M-Code versions, and an Inertial Measurement Unit (IMU) into a system. However, if this integration is not based on an open standard, the extensibility of the system ends up being limited.

3U OpenVPX Timing Card.

3U OpenVPX Timing Card

Based on the Command, Control, Communications, Computers, Cyber, Intelligence, Surveillance, Reconnaissance (C5ISR)/ electronic warfare Modular Open Suite of Standards (CMOSS) and developed in alignment with the Sensor Open Systems Architecture (SOSA™) Technical Standard, the 3U Open VPX Timing Card uses a first-of-its-kind timing architecture to realize the benefits of both centralized and decentralized Position, Navigation and Timing (PNT) source deployment.

This timing architecture produces coherent timing signals within a chassis that can be used by other cards while simultaneously employing a peerto- peer synchronization model between the chassis.

This decentralized approach for timing between the chassis enables new levels of system federation and simplifies the deployment and configuration of new PNT resources.

Key Features

  • Four-channel fiber optic interconnect for multichassis time synchronization
  • Coaxial intra-chassis clock distribution
  • External PNT reference inputs
  • Software-defined PNT engine for decentralization of PNT resources
  • Software-defined PNT system configuration at run time rather than design time
  • Quad-core Arm® Cortex® processor with embedded Linux® operating system
3U OpenVPX Timing Card - Key Benefits.

Decentralized Architecture

Microchip’s PNT system design is based on the MOSA approach and CMOSS/SOSA standards that enable PNT technologies to be interconnected without limitations. The complete stack of hardware and software designed into our portfolio is in alignment with the SOSA Technical Standard for C5ISR systems, All-Source Positioning and Navigation (ASPN) data model and the PNT Operating System (pntOS) plug-in architecture to collectively create a framework that enables PNT technologies to be mixed and matched to achieve new levels of system performance and flexibility.

Traditional timing cards developed in alignment with the SOSA Technical Standard have taken a stovepipe approach by integrating multiple-core PNT sources into a single card. This is a highly centralized approach that limits the flow of PNT information across a system.

Using a decentralized approach largely eliminates the historical constraints on device placement imposed by hierarchical timing architectures, as there is no predefined flow of PNT information. This eliminates a single point of failure associated with hierarchical models and enhances sensor interoperability across vendors/suppliers.

In other words, the traditional construct of defining an authoritative timing source and then distributing that reference to other substations is neither required nor enforced. Our decentralized PNT architecture allows a PNT source deployed in a local node to be utilized by any other peer node. This enables software-defined run-time configuration so that PNT sources no longer need to be designed onto a card in order to work together, or even installed on multiple cards in the same chassis. The decentralized PNT architecture supports a new generation of resilient PNT for critical air-, land- and sea-based missions.

Traditional Approach to PNT

3U OpenVPX Timing Card - Traditional PNT.
  • Hierarchical architecture creates vulnerable points within the system
  • If chassis A becomes compromised, PNT data is unavailable in downstream chassis

Decentralized Approach to PNT

3U OpenVPX Timing Card - decentralized PNT.
  • PNT sources can be deployed independently and within any peer chassis
  • Remote PNT sources can be mapped for use by a local PNT system, enabling inter-chassis peer-to-peer PNT resource sharing

Asynchronous Two-Way Time Transfer

Resilient PNT has emerged as a critical requirement for missions to be successful in GPS-denied environments. The development of fiber optic asynchronous two-way time transfer enables a decentralized architecture for PNT systems to meet evolving mission requirements.

In classic hierarchical timing architecture, one-way time transfer is used to send PNT data from the leader system to follower systems downstream. In the classic model, data can be shared between the chassis in a synchronous manner, which means the two chassis are sharing data at the same time and operate within the same time base.

Asynchronous two-way time transfer over fiber optic connections between the chassis enables each chassis to define its own time base. Asynchronous two-way time transfer transmits signals between chassis clocks asynchronously, and measurement pairing is performed independently by each platform. The system benefits from not needing all PNT resources to be hosted on one plug-in card or in one chassis; instead, resources can be federated throughout the entire system.

3U OpenVPX Timing Card - Synchronous 2-way time transfer.
  • Both chassis operate in their own reference frame/time domain
  • PNT data is time stamped in its local reference frame
  • Asynchronous two-way time transfer occurs over the fiber optic connection between two chassis
  • PNT data is measured and translated into the local reference frame at each chassis via ASPN messages

Software-Defined PNT Model

Timing within a chassis operates autonomously, yet the time domain differences between chassis are measured and understood.

The organization of PNT resources throughout the system is done using ASPN software messages to create a timing plane that is instantiated at the software layers vs. the hardware layer. Organizing PNT sources in a software plane enables decentralized PNT that employs a peer-to-peer architecture with no controlling primary source.

Synchronization and timing flow is defined at run time and supports mixed use of intra-chassis and inter-chassis PNT sources. The software-defined PNT model enables the utilization of decentralized PNT sources in a multi-PNT application with complete independence from the physical deployment of the PNT sources themselves.

Each node, or chassis, operates in its own local frame of reference and uses ASPN messages to translate references for exchanging PNT information. ASPN messages can be used to reallocate PNT resources across multiple chassis in real time, which enables resilient operations when nodes go offline. This shifts the ability for PNT sources to be aligned at the software layer vs. the physical layer, creating a true software-defined PNT model.

3U OpenVPX Timing Card - Model Software.

ASPN messages translate IMU data from chassis A reference frame to chassis D reference frame. The same is true for chassis D using the MAC on chassis B.

A PNT software application can use remote PNT resources along with local PNT resources as if they are all installed within a local chassis.

Card Functional Block Diagram

3U OpenVPX Timing Card - PNT Engine.

Software-Defined PNT Engine

The timing card contains three main software functions to enable software-defined PNT deployments.


The TimeSync software stack includes peer-to-peer measurement, clock steering and a software phase-locked loop. The timing card performs clock offset measurements with picosecond accuracy to enable autonomous time operation between chassis. This enables precise time stamping of PNT measurements for use in a decentralized deployment model. The timing card can steer to different clock sources depending on the local availability of such resources. Clock input selection is software controlled to enable hitless switching between references.

PNT Translation and Routing

PNT measurements are time stamped using the local clock operating in the chassis. The PNT measurements can be routed on demand to a remote chassis and then translated to the local time reference for local consumption. The PNT measurement routing and translation are achieved on the software plane and are independent of the physical transport plane.

Open-standard ASPN messages publish the PNT data from a peer chassis’ reference frame to the local reference frame, enabling data from any PNT source to be used within the local chassis.


The management function enables a user to configure many different settings on the timing card, as well as receive status and diagnostic information. The flexible management port is designed to interface with a variety of command-and-control standards, such as VICTORY.

System Platform

Quad-Core Processor and PolarFire® FPGA

The system platform includes a powerful quad-core processor and a low-power PolarFire FPGA that supports the low-power and small-form-factor requirements of high-speed and compute-intensive systems.

Time Stamping and Clock Distribution

Flexible and configurable clock input management and clock distribution is supported with a unique time stamping architecture enabling clock edge comparisons with picosecond accuracy. Radial clock distribution and coax inter-chassis clock distribution are coherent and calibrated to remove all back plane and cable time delays.

Quad Fiber Asynchronous Two-Way Time Transfer Links

The timing card has a quad fiber interface on the P2 backplane aperture that is fully compliant with SOSA hardware specifications. The fiber is used for inter-chassis connectivity, allowing the timing card to measure its timing reference relative to other system references. The timing card’s quad fiber interface allows a chassis to be connected to four other chassis.

About Microchip

Microchip is a world leader in timing and network synchronization systems for highly accurate distribution using today’s precise timing standards like GPS-based timing. Achieving highly accurate precision timing is no easy feat from a technological perspective, so it is important to find a resource you can trust to reduce design risk and speed your time to market.

Microchip’s end-to-end timing solutions generate, distribute and apply precise time for multiple industries, including communications, aerospace and defense, IT infrastructure, financial services and power utilities. Providing a broad portfolio of clock and timing systems, Microchip has applied expertise in PNT and products that support the SOSA standard to provide world-class solutions for customers.

Visit Microchip Website


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